serial presence detect rev 0.0 july 199 9 pc100 registered dimm rev. 0.0 pc100 registered dimm(168pin) intel type rev1.2 spd specification(64mb d-die base) july 1999
serial presence detect rev 0.0 july 199 9 pc100 registered dimm M377S0823DT3-c1h/c1l(1.2ver) ? organization : 8mx72 ? composition : 8mx8 *9 ? used component part # : k4s640832d-tc1h/c1l ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,500 mil height & double sided component ? refresh : 4k/64ms ? contents : byte # function described function supported hex value note -1h -1l -1h -1l 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 72 bits 48h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 10ns 10ns a0h a0h 2 10 sdram access time from clock @cas latency of 3 6ns 6ns 60h 60h 2 11 dimm configuraion type ecc 02h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x8 08h 14 error checking sdram width x8 08h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 2 & 3 06h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes registered/buffered dqm, address & control inputs 1fh 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 10ns 12ns a0h c0h 2 24 sdram access time @cas latency of 2 6ns 7ns 60h 70h 2 25 sdram cycle time @cas latency of 1 - - 00h 00h 2 26 sdram access time @cas latency of 1 - - 00h 00h 2 27 minimum row precharge time (=t rp ) 20ns 20ns 14h 14h 28 minimum row active to row active delay (t rrd ) 20ns 20ns 14h 14h 29 minimum ras to cas delay (=t rcd ) 20ns 20ns 14h 14h 30 minimum activate precharge time (=t ras ) 50ns 50ns 32h 32h 31 module row density 1 row of 64mb 10h 32 command and address signal input setup time 2ns 20h 33 command and address signal input hold time 1ns 10h 34 data signal input setup time 2ns 20h
serial presence detect rev 0.0 july 199 9 pc100 registered dimm serial presence detect information byte # function described function supported hex value note -1h -1l -1h -1l 35 data signal input hold time 1ns 10h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code current release intel spd 1.2a 12h 63 checksum for bytes 0 ~ 62 - 36h 66h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 3 33h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 7 37h 77 ...... manufacturer part # (data bits) 7 37h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 8 38h 81 manufacturer part # (refresh, # of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 3 33h 83 manufacturer part # (component revision) d 44h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 3 33h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) c 43h 88 manufacturer part # (minimum cycle time) 1 1 31h 31h 89 manufacturer part # (minimum cycle time) h l 48h 4ch 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 3 33h 92 ...... manufacturer revision code (for component) d ( 5th gen.) 44h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 system frequency for 100mhz 100mhz 64h 127 intel specification details detailed 100mhz information 8fh 8dh 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung s own purpose. note :
serial presence detect rev 0.0 july 199 9 pc100 registered dimm m377s1620dt3-c1h/c1l(1.2ver) ? organization : 16mx72 ? composition : 16mx4 *18 ? used component part # : k4s640432d-tc1h/c1l ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,700 mil height & double sided component ? refresh : 4k/64ms ? contents : byte # function described function supported hex value note -1h -1l -1h -1l 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 10 0ah 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 72 bits 48h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 10ns 10ns a0h a0h 2 10 sdram access time from clock @cas latency of 3 6ns 6ns 60h 60h 2 11 dimm configuraion type ecc 02h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x4 04h 14 error checking sdram width x4 04h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 2 & 3 06h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes registered/buffered dqm, address & control inputs and on-card pll 1fh 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 10ns 12ns a0h c0h 2 24 sdram access time @cas latency of 2 6ns 7ns 60h 70h 2 25 sdram cycle time @cas latency of 1 - - 00h 00h 2 26 sdram access time @cas latency of 1 - - 00h 00h 2 27 minimum row precharge time (=t rp ) 20ns 20ns 14h 14h 28 minimum row active to row active delay (t rrd ) 20ns 20ns 14h 14h 29 minimum ras to cas delay (=t rcd ) 20ns 20ns 14h 14h 30 minimum activate precharge time (=t ras ) 50ns 50ns 32h 32h 31 module row density 1 row of 128mb 20h 32 command and address signal input setup time 2ns 20h 33 command and address signal input hold time 1ns 10h 34 data signal input setup time 2ns 20h
serial presence detect rev 0.0 july 199 9 pc100 registered dimm serial presence detect information byte # function described function supported hex value note -1h -1l -1h -1l 35 data signal input hold time 1ns 10h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code current release intel spd 1.2a 12h 63 checksum for bytes 0 ~ 62 - 3fh 6fh 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 3 33h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 7 37h 77 ...... manufacturer part # (data bits) 7 37h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 1 31h 80 ...... manufacturer part # (module depth) 6 36h 81 manufacturer part # (refresh, # of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 0 30h 83 manufacturer part # (component revision) d 44h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 3 33h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) c 43h 88 manufacturer part # (minimum cycle time) 1 1 31h 31h 89 manufacturer part # (minimum cycle time) h l 48h 4ch 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 3 33h 92 ...... manufacturer revision code (for component) d-die (5th gen.) 44h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 system frequency for 100mhz 100mhz 64h 127 intel specification details detailed 100mhz information 8fh 8dh 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung s own purpose. note :
|
